When we discuss AI acceleration, most attention goes to models and hardware acceleration.
At Mile High Video conference 2026 in Denver, I presented the joint work between V-Nova and Intel’s Edge Computing Group exploring a complementary question: can video data structure itself act as a system-level optimization lever for AI pipelines?
AI workloads increasingly consume video, yet legacy single-layer formats were designed for human viewing: full resolution, full frames, full reconstruction.
Machine vision operates differently. Models perform feature extraction, typically on reduced-resolution inputs, sampled frames, or selected regions of interest.
In a conventional 4K analytics pipeline, however, an UHD frame is fully decoded before being resized to the model input (e.g. 448×256). In our benchmark (SSD MobileNet V2, DL Streamer, Intel® Core™ Ultra 7), only ~1.4% of decoded pixels were ultimately used for inference. The remaining pixels still consume decode cycles, scaling effort, and memory bandwidth.
For video-heavy AI pipelines, this decode-scale overhead shifts the bottleneck away from inference and toward data movement and preprocessing.
To address this structural mismatch, we evaluated 2 complementary hierarchical, compute-native video formats, MPEG-5 LCEVC and SMPTE VC-6, on available edge hardware using the VisDrone UHD dataset.
MPEG-5 Part 2 LCEVC is an MPEG video compression standard that adds layers of coded information (high definition details) on top of any (‘base’) codec to improve efficiency and quality.
SMPTE VC-6 is a standardized hierarchical image and video format that encodes every frame as a multi-resolution pyramid, so a pipeline decodes only what it needs, where it needs it.
The results were not incremental:
- LCEVC: Base-layer decoding in full-frame pipelines reduced CPU execution time by 33–52% and improved GPU throughput by roughly 3x, with consistent detector outputs.
- VC-6: In sparse inference scenarios, selective resolution and frame access reduced processing time by up to 96% and enabled order-of-magnitude reductions in I/O. The model architecture and hardware remained unchanged. The difference was the structure of the bitstream.
Hierarchical, compute-aware formats allow AI systems to decode only the resolution, sampling rate, or region required by inference. That translates directly into higher channel density, lower latency, and reduced memory pressure at system level.
If you are designing multi-camera edge analytics, GPU-constrained inference nodes, sparse detection workflows, or bandwidth-limited surveillance deployments, the full benchmarking methodology and results are available in the presentation deck.
Guido Meardi
Co-founder and CEO of V-Nova and a leading voice in the shift toward structured and compute-aware visual data. Under his leadership, V-Nova created the international standards MPEG-5 LCEVC, now mandated in Brazil’s DTV+ standard, and SMPTE VC-6, and built a portfolio of more than 1,400 patents that improve video efficiency, accelerate AI pipelines and enable high fidelity XR with V-Nova PresenZ. Guido has co-authored more than 800 granted patents as the UK’s top inventor by patent grants since 2023.
